hardware · max-os on silicon

An operating system whose drivers are matrices — four boards, real silicon.

MAX-OS is a bare-metal operating system derived from a mathematical paradigm, not ported from Linux. Every driver compiles into a request/response matrix — a selector routes an incoming request to a handler, and an unmatched request gets an honest refusal instead of an undefined fall-through. Four boards, three CPU architectures — plus a working FPGA-fabric target.

Driver-as-matrix, concretely

A conventional OS driver is a hand-written C state machine per device. MAX-OS instead compiles every driver into a request/response matrix — a table of rows, each mapping a selector to a handler (a keyboard scancode, an SDIO command, an interrupt class). An incoming request is looked up by selector; a match dispatches straight to the handler, and a request that matches nothing returns an honest refusal instead of falling through to undefined behaviour.

One transport-agnostic interpreter walks that table for every board and every bus — the same generic dispatch core serves USB, SDIO, MMIO register programs, and network wire formats, with only the table changing per device. That is what makes the four boards below one story instead of four separate rewrites.

Raspberry Pi 3B+ — fully proven

The furthest-along board. Keyboard, mouse, network, and Bluetooth (LE scan) are all decoded and answering on real hardware over the on-board USB/DWC2 host controller, driven entirely by MAX-compiled matrix dispatch — no vendor Linux driver in the loop.

Jetson Orin — bare-metal kernel, GPU register access, GPU compute proven

A bare-metal kexec boot chain runs on the real Tegra234 board with no underlying OS. From there, code running at EL1 has read the GPU's own chip-identification register directly on the metal, and a separate probe has reached the DCE display-coprocessor over its hardware mailbox — real register-level contact with two of the GPU's hardest-to-reach surfaces.

Separately, a matrix-multiply compiled straight through MAX's own CUDA-target compiler has been measured bit-exact against a CPU reference on this same GPU — see direct matrix-multiply into the boardbelow. The next rung is wiring that proven kernel through the fully bare-metal submission path, gated stage by stage on the lab's own silicon-campaign runbook.

Kendryte K230 — the wearable cortex, camera live over USB

A dual-core RISC-V (XuanTie C908) wearable board is flashed, alive, and driven directly over its USB debug channel. Its camera streams real JPEG frames over USB to the host, silicon-stable, and runs today as the "eye" of a live agent loop — presence detection, understanding, recognition, and a greeting — the working shape of the wearable mobile AI cortex.

The from-scratch, bare-metal MAX-native driver-as-matrix port for this board — matching the same architecture proven on the Pi — reuses the RISC-V64 boot skeleton already proven on the sibling Orange Pi R2S port and the DWC2 USB driver already silicon-proven on the Pi (same Synopsys IP core). That reuse is what keeps this a bounded next build, not a from-scratch bring-up.

Orange Pi R2S — silicon port on the finish line

An 8-core RISC-V (SpacemiT K1, RV64GCVB, dual 2.5GbE) board is on the bench, and its boot and UART already answer on the real silicon — the kernel prints over the real K1 UART with no simulator involved. The remaining rungs are the interrupt controller and the on-board NIC bring-up; the crypto and scene-composition layers are already proven byte-identical on this board's architecture against the Pi's ARM64 build, from the same MAX source.

Also on FPGA fabric — Zynq-7020

Beyond the four ARM/RISC-V boards, MAX-OS also runs bare-metal on a Xilinx Zynq-7020 SoC — a dual ARM Cortex-A9 processing system paired with programmable logic. The processing-system side boots bare-metal (UART, Gigabit-Ethernet MAC, interrupt controller) the same way the other boards do.

What makes this board different is the programmable-logic fabric next to the CPU: a SHA-256 / Poly1305 cryptographic engine, a scene-compositor framebuffer rect-blitter, and an AXI accelerator contract all run as hardware circuits in the fabric — not software on the A9. Each was verified in Verilator simulation against a golden-vector testbench, byte-identical to its proven MAX/C software counterpart, before being trusted as a hardware replacement. This deployment currently runs on a separate lab machine, pending migration onto the main silicon-campaign rig.

Direct matrix-multiply into the board

The Orin GEMM result above is unusual for a reason: there is no C driver, no userspace CUDA runtime, and no cuBLAS or cuDNN anywhere in the path. MAX's own compiler lowers a matrix-multiply written in the language directly to a @cuda_kernel— real GPU machine code emitted by the lab's own compiler, not handed off to a vendor toolchain at runtime. The matrix multiply does not call a driver; the compiler turns it into the hardware instructions themselves.

Why it matters

Most operating systems are millions of lines of hand-written C, ported and patched over decades. MAX-OS is derived fresh from a mathematical paradigm — one language, one matrix-dispatch mechanism, one crypto and scene stack, proven across four boards and three CPU architectures instead of rewritten from scratch for each.